AND from NAND — universal gates

introNAND then invert

Answer

2 NAND gates realising A · B

Why this example is worth doing

Two gates: a NAND to compute the complement of the product, then a tied-input NAND to invert it back. The page pairs the drawing with the algebra so that involution is visibly doing the work. It also flags the practical consequence that a NAND-only netlist never actually contains this pattern — a synthesiser would push the inversion into the next stage rather than pay for a gate that only undoes the previous one.

Try your own input in the Universal gates. Rebuild any of the other gates using only NAND, or only NOR, with the gate count.

How the answer is reached

Gate list

Gate list — columns Node, Gate, Inputs
NodeGateInputs
g1nandA, B
g2nandg1, g1

NAND-only realisation

A ↑ B ↑ (A ↑ B)A · B2 NAND gates, verified by reading the network back out.

Truth table

Truth table — columns #, A, B, A ↑ B ↑ (A ↑ B)
#ABA ↑ B ↑ (A ↑ B)
0000
1010
2100
3111

Compare with

Open this example in the Universal gates

The field arrives filled in with this example’s input.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Sheffer, “A Set of Five Independent Postulates for Boolean Algebras” (1913)
  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)