Digital Logic Toolkit — Gates & Circuits
Logic gates and circuits
Eight gates, two symbol standards and the circuits built from them. Every truth value on this page is computed by the same engine that drives the tools it links to, so the reference and the calculator cannot disagree.
What is a logic gate?
A logic gate is a circuit element that takes one or more binary inputs — each of them either 0 or 1 — and produces exactly one binary output, determined only by the present combination of its inputs and not by anything that happened before. Each gate implements a single Boolean operation, so a truth table listing every input combination is its complete specification. There are seven in ordinary use plus the buffer, and every one of them can be built from NAND alone, or NOR alone.
| A | B | AND | OR | NAND | NOR | XOR | XNOR |
|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
| A | NOT | Buffer |
|---|---|---|
| 0 | 1 | 0 |
| 1 | 0 | 1 |
The same eight gates written as algebra.
- AND
- A·B
- OR
- A + B
- NOT
- Ā
- NAND
- (A·B)′ = Ā + B̄
- NOR
- (A + B)′ = Ā·B̄
- XOR
- A ⊕ B = A·B̄ + Ā·B
- XNOR
- A ⊙ B = A·B + Ā·B̄
- Buffer
- A
The eight gates
Each card carries the gate’s symbol, its algebraic form and its complete truth table. The page behind it adds both symbol standards side by side, a live input toggle, the NAND-only and NOR-only builds and the worked examples.
AND gate
A·B
AND truth table A B AND 0 0 0 0 1 0 1 0 0 1 1 1 Output 1 only when every input is 1.
OR gate
A + B
OR truth table A B OR 0 0 0 0 1 1 1 0 1 1 1 1 Output 1 when at least one input is 1.
NOT gate
Ā
NOT truth table A NOT 0 1 1 0 One input, inverted. Also called an inverter.
NAND gate
(A·B)′ = Ā + B̄
NAND truth table A B NAND 0 0 1 0 1 1 1 0 1 1 1 0 AND followed by an inverter, and universal on its own.
NOR gate
(A + B)′ = Ā·B̄
NOR truth table A B NOR 0 0 1 0 1 0 1 0 0 1 1 0 OR followed by an inverter, and the other universal gate.
XOR gate
A ⊕ B = A·B̄ + Ā·B
XOR truth table A B XOR 0 0 0 0 1 1 1 0 1 1 1 0 Output 1 when the inputs differ — the difference detector.
XNOR gate
A ⊙ B = A·B + Ā·B̄
XNOR truth table A B XNOR 0 0 1 0 1 0 1 0 0 1 1 1 Output 1 when the inputs match — the equality detector.
Buffer
A
Buffer truth table A Buffer 0 0 1 1 Output follows the input; it restores drive and adds delay.
Symbols: distinctive and rectangular
The distinctive shapes of ANSI/IEEE Std 91-1984 dominate teaching in the US and UK; the rectangular symbols of IEC 60617-12 dominate continental Europe and much of Asia. Handing in the wrong set costs marks, so pick yours here and every diagram on the site will use it.
Distinctive shapes — ANSI/IEEE Std 91-1984
- AND
- OR
- NOT
- NAND
- NOR
- XOR
- XNOR
- Buffer
Rectangular shapes — IEC 60617-12
- AND
- OR
- NOT
- NAND
- NOR
- XOR
- XNOR
- Buffer
IEC 60617-12 is a paid standard whose per-symbol dimensions are not public. These rectangular symbols follow the published module-grid construction, so they are a reasonable construction rather than quoted metrics.
Symbols and universality
Logic gate symbols
Every gate in both symbol standards, side by side, on a printable one-page chart.
Universal gates
Rebuild any of the other gates using only NAND, or only NOR, with the gate count.
Building circuits
Logic gate diagram builder
Draw an expression as a gate schematic in IEEE or IEC symbols and copy it as an image.
Logic circuit → expression
Wire up gates and read the Boolean expression and truth table back out.
Half adder & full adder
Truth tables, K-maps and circuits for both adders, and the ripple-carry chain.
Flip-flops & latches
SR, D, JK and T: characteristic tables, excitation tables and timing diagrams.
Multiplexers & decoders
Multiplexers from 2:1 to 16:1 and decoders from 2:4 to 4:16, with the selection logic derived.
Related
The other two sections, and where they meet this one.
- Boolean & Minimisation
Turn one expression into every other form of itself, and reduce it with named laws.
- Numbers & Codes
Convert between bases and representations, and check the codes that detect and fix errors.