OR from NAND — universal gates
coreinvert both inputs, then NAND
Answer
3 NAND gates realising B + A
Why this example is worth doing
Three gates: invert each input, then NAND the results, which is De Morgan read right to left. This is the expensive direction and the reason the page keeps a running cost table — OR is cheap in NOR-world and dear in NAND-world, and the totals for a whole design follow from which form its minimal expression takes. The table is the page's main deliverable, not the individual constructions.
Try your own input in the Universal gates. Rebuild any of the other gates using only NAND, or only NOR, with the gate count.
How the answer is reached
Gate list
| Node | Gate | Inputs |
|---|---|---|
| g1 | nand | A, A |
| g2 | nand | B, B |
| g3 | nand | g1, g2 |
NAND-only realisation
A ↑ A ↑ (B ↑ B)B + A— 3 NAND gates, verified by reading the network back out.
Truth table
| # | A | B | A ↑ A ↑ (B ↑ B) |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 2 | 1 | 0 | 1 |
| 3 | 1 | 1 | 1 |