Ā·B + A·B̄ — logic gate diagram
core5 gates as SOP vs 1 XOR gate
Answer
5 gates, 2 inputs; output column 0110
Why this example is worth doing
XOR built the long way, out of two inverters, two ANDs and an OR. Drawing it explicitly is worth doing once, because the single XOR symbol otherwise looks like it comes from nowhere. The page renders both and puts the gate counts side by side: five gates and three levels against one gate and one level. It also shows the fan-out dots where A and B each drive two loads, which is the first diagram on the site where a signal branches and the junction notation has to be explained.
Try your own input in the Logic gate diagram builder. Draw an expression as a gate schematic in IEEE or IEC symbols and copy it as an image.
How the answer is reached
Netlist
| Node | Gate | Inputs |
|---|---|---|
| g0 | not | i0 |
| g1 | and | g0, i1 |
| g2 | not | i1 |
| g3 | and | i0, g2 |
| g4 | or | g1, g3 |
Truth table
| # | A | B | F |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 2 | 1 | 0 | 1 |
| 3 | 1 | 1 | 0 |