A·B + C — logic gate diagram
intro2 primitive gates, 2 levels
Answer
2 gates, 3 inputs; output column 01010111
Why this example is worth doing
The minimal two-level AND-OR network, and the diagram every other one on the page is a variation of. One AND gate takes A and B, one OR gate takes that output and C. The page uses it to establish the drawing conventions the rest of the site inherits: inputs enter on the left in declared order, signal flow is strictly left to right, and gate depth maps to a column so that propagation delay is readable as horizontal distance. It also introduces the IEEE/IEC toggle without the diagram reflowing.
Try your own input in the Logic gate diagram builder. Draw an expression as a gate schematic in IEEE or IEC symbols and copy it as an image.
How the answer is reached
Netlist
| Node | Gate | Inputs |
|---|---|---|
| g0 | and | i0, i1 |
| g1 | or | g0, i2 |
Truth table
| # | A | B | C | F |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 1 |
| 2 | 0 | 1 | 0 | 0 |
| 3 | 0 | 1 | 1 | 1 |
| 4 | 1 | 0 | 0 | 0 |
| 5 | 1 | 0 | 1 | 1 |
| 6 | 1 | 1 | 0 | 1 |
| 7 | 1 | 1 | 1 | 1 |