Half adder: one XOR and one AND — circuit to expression
coresum output reads back as A ⊕ B
Answer
A′ · B + A · B′ (output column 0110)
Why this example is worth doing
A two-output circuit, which is where reading a schematic stops being a single expression. The tool reports one expression per output — A ⊕ B for sum and A·B for carry — and the page insists on that framing because students trained on single-output problems try to combine them. It is also the first circuit on the page with a name attached to it, and the link to the adders page carries the netlist across so the same drawing can be read with its K-maps beside it.
Try your own input in the Logic circuit → expression. Wire up gates and read the Boolean expression and truth table back out.
How the answer is reached
Gate list
| Node | Gate | Inputs |
|---|---|---|
| sum | xor | A, B |
| carry | and | A, B |
Quine–McCluskey
| # | Term |
|---|---|
| 1 | A′ · B |
| 2 | A · B′ |
| # | Cover |
|---|---|
| 1 | A′ · B + A · B′ |
Warning:
2 term(s), 4 literal(s); 2 essential prime implicant(s).
Truth table
| # | A | B | F |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 1 |
| 2 | 1 | 0 | 1 |
| 3 | 1 | 1 | 0 |