Cross-coupled NOR latch, both inputs 0 — circuit to expression

coreno combinational expression: state is held

Answer

cycle detected — no combinational expression (q → qn → q)

Note:

A cyclic netlist stores state. Its output depends on its own history, so no combinational expression describes it.

Why this example is worth doing

The circuit that breaks the tool, deliberately. Two NOR gates each feeding the other's input form a loop, and a loop has no combinational expression at all — the output depends on history, not just on the current inputs. The reader detects the cycle and says so rather than diverging or emitting nonsense, then sends the reader to the flip-flops page for the characteristic-equation treatment. Knowing when a question is not a combinational question is the actual lesson.

Try your own input in the Logic circuit → expression. Wire up gates and read the Boolean expression and truth table back out.

How the answer is reached

Gate list

Gate list — columns Node, Gate, Inputs
NodeGateInputs
qnorR, qn
qnnorS, q

Feedback loop

Combinational feedback loop: q → qn → q. Sequential logic is not supported.

Compare with

Open the Logic circuit → expression

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)
  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions