Four NAND gates wired as the classic XOR — circuit to expression

introreads back as A ⊕ B

Answer

A′ · B + A · B′ (output column 0110)

Why this example is worth doing

The four-NAND XOR, and the circuit most likely to appear as an unlabelled schematic in an exam with "find the output expression" underneath. Traced node by node it produces a formidable-looking nest of complements which collapses to A ⊕ B. The tool shows the expression at every internal node rather than only at the output, because the marks are for the intermediate labels, and it flags that this is a known circuit by name once the function is identified.

Try your own input in the Logic circuit → expression. Wire up gates and read the Boolean expression and truth table back out.

How the answer is reached

Gate list

Gate list — columns Node, Gate, Inputs
NodeGateInputs
g1nandA, B
g2nandA, g1
g3nandg1, B
g4nandg2, g3

Quine–McCluskey

Prime implicants — Quine–McCluskey
#Term
1A′ · B
2A · B′
Minimum cover — Quine–McCluskey
#Cover
1A′ · B + A · B′
Warning:

2 term(s), 4 literal(s); 2 essential prime implicant(s).

Truth table

Truth table — columns #, A, B, F
#ABF
0000
1011
2101
3110

Compare with

Open the Logic circuit → expression

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)
  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions