Digital Logic Toolkit

Digital Logic Toolkit — Half adder & full adder

Source
https://digitallogictoolkit.com/adders/
Printed

Half adder, A = 1, B = 1 — adders

intro1 + 1 = 10 in binary

Answer

S = 0, C = 1

Why this example is worth doing

The row that explains why a half adder needs two outputs. One plus one is two, which does not fit in one bit, so the sum bit is 0 and the carry is 1 — the answer is the two-bit number 10. Students who expect a single output get stuck exactly here, and the page opens on it rather than on the trivial rows. The sum is A ⊕ B and the carry is A·B, two gates in total.

Try your own input in the Half adder & full adder. Truth tables, K-maps and circuits for both adders, and the ripple-carry chain.

How the answer is reached

The probed row

A = 1, B = 1

Output table

Output table — columns A, B, S, C
ABSC
0000
0110
1010
1101

Compare with

Open the Half adder & full adder

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)
  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions