Digital Logic Toolkit

Digital Logic Toolkit — Half adder & full adder

Source
https://digitallogictoolkit.com/adders/
Printed

Half adder, full truth table — adders

introtwo outputs, four rows

Answer

S column 0110, C column 0001

Why this example is worth doing

Both output columns beside each other, which is where the XOR and AND gates are seen to fall out of the specification rather than being chosen. Reading the S column gives XOR's table exactly; reading C gives AND's. The page presents the derivation in that direction — table first, gates second — because that is the direction real design goes, and it is the habit the K-map and minimisation pages depend on.

Try your own input in the Half adder & full adder. Truth tables, K-maps and circuits for both adders, and the ripple-carry chain.

How the answer is reached

Output table

Output table — columns A, B, S, C
ABSC
0000
0110
1010
1101

Compare with

Open the Half adder & full adder

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)
  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions