NOT from NAND — universal gates
introthe base case
Answer
1 NAND gate realising A′
Why this example is worth doing
The one-gate construction that everything else rests on: tie both inputs together and idempotence plus the output bubble give inversion. The page starts here because every subsequent conversion uses it as a subroutine, and because it is the step that makes the completeness proof work at all — without a way to build NOT, no single gate type could be universal.
Try your own input in the Universal gates. Rebuild any of the other gates using only NAND, or only NOR, with the gate count.
How the answer is reached
Gate list
| Node | Gate | Inputs |
|---|---|---|
| g1 | nand | A, A |
NAND-only realisation
A ↑ AA′— 1 NAND gates, verified by reading the network back out.
Truth table
| # | A | A ↑ A |
|---|---|---|
| 0 | 0 | 1 |
| 1 | 1 | 0 |