NOT from NAND — universal gates

introthe base case

Answer

1 NAND gate realising A′

Why this example is worth doing

The one-gate construction that everything else rests on: tie both inputs together and idempotence plus the output bubble give inversion. The page starts here because every subsequent conversion uses it as a subroutine, and because it is the step that makes the completeness proof work at all — without a way to build NOT, no single gate type could be universal.

Try your own input in the Universal gates. Rebuild any of the other gates using only NAND, or only NOR, with the gate count.

How the answer is reached

Gate list

Gate list — columns Node, Gate, Inputs
NodeGateInputs
g1nandA, A

NAND-only realisation

A ↑ AA′1 NAND gates, verified by reading the network back out.

Truth table

Truth table — columns #, A, A ↑ A
#AA ↑ A
001
110

Compare with

Open this example in the Universal gates

The field arrives filled in with this example’s input.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • Sheffer, “A Set of Five Independent Postulates for Boolean Algebras” (1913)
  • Shannon, “A Symbolic Analysis of Relay and Switching Circuits” (1938)