OR as an inverted-input NAND — OR gate

exam standardthe alternative IEEE symbol

Answer

verified equivalent (both sides → B + A)

Why this example is worth doing

OR drawn as a NAND body with both inputs bubbled — De Morgan again, and the second half of the pair introduced on the AND page. The page's advice is procedural: when reading an unfamiliar schematic, first push bubbles until they cancel, then read the shapes. Doing it in the other order, reading shapes first and worrying about bubbles afterwards, is how students end up computing the complement of the circuit they were given.

Try your own input in the OR gate. Truth table, symbol and algebraic form for A + B, with a live two-input toggle.

How the answer is reached

The law

A + B(A′ · B′)′Both sides have the same truth table over the union of their variables.

Truth table

Truth table — columns #, A, B, F
#ABF
0000
1011
2101
3111

Compare with

Open the OR gate

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions
  • IEC 60617-12, Graphical Symbols for Diagrams — Binary Logic Elements