Wired-OR on an open-drain bus — OR gate

edge caseOR without a gate

Answer

LINE column 00000001

Why this example is worth doing

A bus where every device can pull the line low and a resistor pulls it high implements OR — or AND, depending on which polarity you call true — with no gate at all. It is the one example on the page where the logic function is a property of the wiring rather than of a component, and it is how I²C and open-drain interrupt lines work. The page flags that active-low signalling makes the AND/OR distinction a matter of naming, which is a genuinely useful thing to have said out loud.

Try your own input in the OR gate. Truth table, symbol and algebraic form for A + B, with a live two-input toggle.

How the answer is reached

Output table

Output table — columns D1, D2, D3, LINE
D1D2D3LINE
0000
0010
0100
0110
1000
1010
1100
1111

Compare with

Open the OR gate

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions
  • IEC 60617-12, Graphical Symbols for Diagrams — Binary Logic Elements