Ring oscillator: three inverters in a loop — NOT gate
edge casewhen a combinational circuit has no answer
Answer
A′
Why this example is worth doing
An odd number of inverters wired in a ring has no consistent assignment of 0s and 1s — every solution contradicts itself — so the circuit oscillates instead of settling. It is the sharpest demonstration that combinational analysis assumes a loop-free network, and it is a real measurement structure used to characterise process speed on silicon. The page notes that an even number of inverters in a ring is a memory cell instead, which leads directly to the latch.
Try your own input in the NOT gate. Truth table, symbol and algebraic form for the inverter, Ā.
How the answer is reached
Step by step
A′′′A′— Involution (double negation) — (A')' = A
A′′′ simplifies to A′ in 1 step. That is a proven minimum (1 term, 1 literal), not a best effort. It is the only minimum-cost form.
Quine–McCluskey
| # | Term |
|---|---|
| 1 | A′ |
| # | Cover |
|---|---|
| 1 | A′ |
1 term(s), 1 literal(s); 1 essential prime implicant(s).
Truth table
| # | A | F |
|---|---|---|
| 0 | 0 | 1 |
| 1 | 1 | 0 |