D latch, transparent when enabled — flip-flops
corelevel-sensitive, not edge-triggered
Answer
Q⁺ column 01010011
Why this example is worth doing
A D latch follows its input continuously for as long as the enable is high, which is called transparency and is the property that distinguishes a latch from a flip-flop. The page draws the timing diagram showing the output tracking the input mid-pulse, and states plainly that this is why latches are difficult in synchronous design: the window during which data can change the state has a width rather than being an instant.
Try your own input in the Flip-flops & latches. SR, D, JK and T: characteristic tables, excitation tables and timing diagrams.
How the answer is reached
Output table
| EN | D | Q | Q⁺ |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |