Two NAND gates in a chain — circuit to expression
exam standardreads back as A·B + C̄
Answer
C′ + A · B (output column 10101011)
Why this example is worth doing
A circuit whose read-back expression is simpler than the drawing suggests: two NANDs in series come out as A·B + C̄, an AND, an inverter and an OR. That gap is the reason this direction of the tool exists. Analysis is not just transcription — once you have the expression you can re-minimise it and discover that the given circuit is not the cheapest one for its own function. The page pipes the result straight into the simplifier and reports the gate-count difference.
Try your own input in the Logic circuit → expression. Wire up gates and read the Boolean expression and truth table back out.
How the answer is reached
Gate list
| Node | Gate | Inputs |
|---|---|---|
| g1 | nand | A, B |
| g2 | nand | g1, C |
Quine–McCluskey
| # | Term |
|---|---|
| 1 | C′ |
| 2 | A · B |
| # | Cover |
|---|---|
| 1 | C′ + A · B |
Warning:
2 term(s), 3 literal(s); 2 essential prime implicant(s).
Truth table
| # | A | B | C | F |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 2 | 0 | 1 | 0 | 1 |
| 3 | 0 | 1 | 1 | 0 |
| 4 | 1 | 0 | 0 | 1 |
| 5 | 1 | 0 | 1 | 0 |
| 6 | 1 | 1 | 0 | 1 |
| 7 | 1 | 1 | 1 | 1 |