Digital Logic Toolkit

Digital Logic Toolkit — AND gate

Source
https://digitallogictoolkit.com/and-gate/
Printed

AND as an enable: data · enable — AND gate

edge casethe gate as a switch

Answer

Y column 0001

Why this example is worth doing

Rename the inputs and the gate becomes a component: with one input called enable and the other called data, AND passes the data through when enabled and forces 0 when not. Almost every clock-gating and bus-gating circuit in a real design is this. The page makes the naming explicit because students who have only seen A and B do not recognise the same gate when it turns up in a block diagram with functional labels, and that recognition is the whole point of learning the primitives.

Try your own input in the AND gate. Truth table, symbol and algebraic form for A·B, with a live two-input toggle.

How the answer is reached

Output table

Output table — columns data, enable, Y
dataenableY
000
010
100
111

Compare with

Open the AND gate

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions
  • IEC 60617-12, Graphical Symbols for Diagrams — Binary Logic Elements