Even-parity generator over four bits — XNOR gate
edge casethe transmit-side parity circuit
Answer
P column 1001011001101001
Why this example is worth doing
Three XNOR gates over four data bits produce the even-parity bit that gets appended before transmission. The page builds it as a balanced tree rather than a chain, because the tree has two gate delays instead of three and parity circuits sit on the critical path of memory interfaces. It hands off to the parity and checksum tool, where the same computation is done on bytes and words with the arithmetic shown.
Try your own input in the XNOR gate. Truth table, symbol and algebraic form for A ⊙ B, the equality detector.
How the answer is reached
Output table
| B3 | B2 | B1 | B0 | P |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 0 | 1 | 0 |
| 0 | 0 | 1 | 0 | 0 |
| 0 | 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 0 | 1 | 1 |
| 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 0 | 1 | 1 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 | 1 |