NOT from a NOR with tied inputs — NOT gate

corethe dual construction

Answer

1 NOR gate realising A′

Why this example is worth doing

The NOR version of the same trick, resting on A + A = A instead. Having both on the page matters because the two universal families are not interchangeable in practice: a NAND-only design and a NOR-only design of the same function generally have different gate counts, and which is cheaper depends on the function. The universal gates page tabulates that comparison; this entry is where the question first comes up.

Try your own input in the NOT gate. Truth table, symbol and algebraic form for the inverter, Ā.

How the answer is reached

Gate list

Gate list — columns Node, Gate, Inputs
NodeGateInputs
g1norA, A

NOR-only realisation

A ↓ AA′1 NOR gates, verified by reading the network back out.

Truth table

Truth table — columns #, A, A ↓ A
#AA ↓ A
001
110

Compare with

Open the NOT gate

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions
  • IEC 60617-12, Graphical Symbols for Diagrams — Binary Logic Elements