3-input NAND, A = 1, B = 1, C = 0 — NAND gate
coreone low input forces the output high
Answer
output 1
Why this example is worth doing
With one input low the AND is 0 and the NAND is therefore 1. Generalised: a NAND is low only when every input is high, at any width. The page notes that three- and four-input NANDs are common physical parts while eight-input ones are rare, because stacking that many transistors in series degrades the drive strength — a rare place where the electrical reality visibly constrains the logic design.
Try your own input in the NAND gate. Truth table, symbol and algebraic form for (A·B)′, the universal gate.
How the answer is reached
The probed row
A = 1, B = 1, C = 01— Row 6 of 8.
Truth table
| # | A | B | C | A ↑ B ↑ C |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 2 | 0 | 1 | 0 | 1 |
| 3 | 0 | 1 | 1 | 0 |
| 4 | 1 | 0 | 0 | 1 |
| 5 | 1 | 0 | 1 | 0 |
| 6 | 1 | 1 | 0 | 1 |
| 7 | 1 | 1 | 1 | 1 |