SR latch from two cross-coupled NANDs — NAND gate
exam standardthe memory element
Answer
Q⁺ = 1
Why this example is worth doing
Two NANDs, each feeding the other, form an active-low SR latch — the first sequential circuit most students build. Inputs idle at 1 and are asserted by pulling low, which is why the labels carry overbars, and driving both low at once produces the forbidden state where both outputs go high and the next value depends on which input releases first. The page names it a race rather than calling it undefined, and hands off to the flip-flops page.
Try your own input in the NAND gate. Truth table, symbol and algebraic form for (A·B)′, the universal gate.
How the answer is reached
The probed row
Sn = 1, Rn = 1, Q = 1
Output table
| Sn | Rn | Q | Q⁺ |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 |
| 1 | 1 | 1 | 1 |