NAND as an inverted-input OR — NAND gate

edge casethe alternative symbol, and why it is used

Answer

verified equivalent (both sides → A′ + B′)

Why this example is worth doing

The De Morgan twin of the NAND symbol: an OR body with bubbles on both inputs. In a NAND-only design the two symbols alternate along every path so that bubbles meet in pairs and cancel visually, turning an unreadable sea of identical gates into a diagram whose AND-OR structure is obvious at a glance. This is the practical payoff of the bubble-pushing discipline the diagram pages introduce.

Try your own input in the NAND gate. Truth table, symbol and algebraic form for (A·B)′, the universal gate.

How the answer is reached

The law

(A · B)′A′ + B′Both sides have the same truth table over the union of their variables.

Truth table

Truth table — columns #, A, B, F
#ABF
0001
1011
2101
3110

Compare with

Open the NAND gate

This input is entered in the tool itself — it is too rich for a link to carry.

Note:

Notation this page assumes

  • Symbols: · is AND, + is OR, ⊕ is XOR, a prime or an overline is NOT. The field also takes ∧ ∨ ¬ ~ ! & | and the words.
  • Operator precedence, tightest first: NOT, then AND (including juxtaposition), then XOR/XNOR, then NAND/NOR, then OR, then IMPLIES, then IFF.
  • Gate symbols follow whichever standard the header toggle is set to: ANSI/IEEE Std 91-1984 distinctive shapes, or IEC 60617-12 rectangles.

Sources

  • ANSI/IEEE Std 91-1984, Graphic Symbols for Logic Functions
  • IEC 60617-12, Graphical Symbols for Diagrams — Binary Logic Elements
  • Sheffer, “A Set of Five Independent Postulates for Boolean Algebras” (1913)